题目/Title：A pipelined A/D conversion technique with low INL and DNL

作者/Author：
                        Jingbo Duan,Fule Li,Liyuan Liu,Dongmei Li,Yongmin Li,Zhihua Wang

会议/Conference：ISCAS 2007

地点/Location：New Orleans, LA

年份/Issue Date：2007.27-30 May

页码/pages：pp. 3391 - 3394

摘要/Abstract：
A capacitor switching technique for 1.5-bit/stage pipeline A/D converters is presented. This technique improves both integral nonlinearity (INL) and differential nonlinearity (DNL) performance due to capacitor mismatch. Monte Carlo simulation is carried out with all components\' mismatches considered. The results show that the INL can be improved by 2.5 times and the DNL can be improved by 5 times. Comparing with the conventional capacitor mismatch calibration techniques, the proposed technique has the characteristics such as simple calibration circuits, undegraded conversion rate, and insensitive to the operation environment.