题目/Title：A 100Mb/s 3.5GHz Fully-Balanced BFOOK Modulator Based on Integer-N Hyrbrid PLL

作者/Author：
                        Cong Ding,Haixin Song,Woogeun Rhee,Zhihua Wang

会议/Conference：A-SSCC 2019

地点/Location：Macau, Macao

年份/Issue Date：2019.4-6 Nov.

页码/pages：pp. 291 - 294

摘要/Abstract：
This paper presents an energy-efficient high data rate constant-envelope modulator by employing a binary frequency-domain on-off keying (BFOOK) method. Thanks to the fully-balanced FSK feature, high data rate BFOOK modulation is performed based on an integer-N hybrid PLL with VCO modulation only. A carrier spreading technique based on low-frequency wideband triangular modulation can also be added as an optional fractional-N mode in case carrier power suppression is needed to have better spectrum compliance. A prototype 3.5GHz modulator is implemented in 65nm CMOS. The BFOOK modulator achieves the maximum data rate of 100Mb/s, maintaining averaged center frequency regardless of the data pattern. The modulator consumes 9.6mW from a 1V supply, achieving the energy efficiency of 96pJ/b.