题目/Title：A 40-80Gb/s PAM4 Wireline Transmitter in 65nm CMOS Technology

作者/Author：
                        Fangxu Lv,Xuqiang Zheng,Shuai Yuan,Ziqiang Wang,Yajun He,Chun Zhang,Zhihua Wang,Fangxu Lv,Jianye Wang

会议/Conference：MWSCAS 2017

地点/Location：Boston, MA, USA

年份/Issue Date：2017.6-9 Aug.

页码/pages：pp. 539 - 542

摘要/Abstract：
This paper presents a 40–80 Gb/s quarter rate PAM4 wireline transmitter. The transmitter incorporates a 2-tap feed-forward equalizer (FFE) based on multiple-multiplex (MUX) and a parallel PRBS7 generator. The transmitter is achieved in 65nm CMOS technology and supplied with 1.2V. The simulation results show that the proposed transmitter can work at 40–80 Gb/s with 4-level pulse amplitude modulation (PAM4) and consumes 173mW at 80 Gb/s.