题目/Title：2.5 mW 370mV/pF 高线性度不受寄生电容影响的全对称电容式传感器读出电路
                        A 2.5 mW 370 mV/pF high linearity stray-immune symmetrical readout circuit for capacitive sensors

作者/Author：周凯敏,王自强,张春,李福乐
                        Kaimin Zhou,Ziqiang Wang,Chun Zhang,Zhihua Wang

期刊/Journal：半导体学报 Chinese Journal of Semiconductors

年份/Issue Date：2012

卷（期）及页码/Volume（No.）&pages：Vol.33, No.6

摘要/Abstract：
本文提出了一种不受寄生电容影响的适用于电容式传感器的全对称电容电压转换电路。通过引入参考支部实现了对称的 读出电路结构，线性输入的范围从而得到增大，两个运放的系统失调也相互抵消，共模点的噪声干扰和偶次谐波得到了抑制。窄波技术的运用进一步减小了运放失调 和闪烁噪声的影响。Verilog-A模型的容抗管用来模拟真实的可变待测电容。仿真结果表明该电路的输出电压能够准确的响应待测电容在1KHz频率下的 变化。该芯片采用片上金属绝缘金属电容阵列来进行测试。测试结果表明电路的灵敏度为370mV/pF，非线性误差在1%
A stray-insensitive symmetrical capacitance-to-voltage converter for capacitive sensors is presented. By introducing a reference branch, a symmetrical readout circuit is realized. The linear input range is increased, and the systematic offsets of two input op-amps are cancelled. The common-mode noise and even-order distortion are also rejected. A chopper stabilization technique is adopted to further reduce the offset and flicker noise of the op-amps, and a Verilog-A-based varactor is used to model the real variable sensing capacitor. Simulation results show that the output voltage of this proposed readout circuit responds correctly, while the under-test capacitance changes with a frequency of 1 kHz. A metal-insulator-metal capacitor array is designed on chip for measurement, and the measurement results show that this circuit achieves sensitivity of 370 mV/pF, linearity error below 1% and power consumption as low as 2.5 mW. This symmetrical readout circuit can respond to an FPGA controlled sensing capacitor array changed every 1 ms.