题目/Title：亚阈值32位数据通路设计
                        Subthreshold 32-bit Data Path Design

作者/Author：刘鸣,陈虹,贾晨,王志华
                        Ming Liu,Hong Chen,Chen Jia,Zhihua Wang

期刊/Journal：清华大学学报（自然科学版） Journal of Tsinghua University (Science and Technology)

年份/Issue Date：2010.Jan.

卷（期）及页码/Volume（No.）&pages：Vol.50, No.1, pp. 9 - 12

摘要/Abstract：
亚阈值数字电路技术是特殊的超低功耗技术，适用于对低功耗要求苛刻，但速度要求不高的应用领域。该文提出了亚阈值数字标准单元设计方法，从尺寸、驱动、结构三个方面设计了亚阈值数字标准单元库。一个采用亚阈值单元库设计的32位数据通路结果表明：和采用传统库相比，数据通路的噪声容限提高了8%，工作频率提高42%，能耗降低27%，能量延迟积降低49%，漏电流降低64%。
Sub-threshold digital circuits is an ultra-low power technology for applications that do not require high speed. This paper provides circuit design methods for sub-threshold standard cells including size, drive capability, and structure for a sub-threshold digital standard library. Simulations of a 32-bit data-path designed using the sub-threshold cells show that the noise margin of the new data-path is improved by 8%, the frequency by 42%,the energy consumption by 27%,the Energy-Delay Product(EDP) by 49% and the leakage current by 64% compared with the convention library.