题目/Title：A Low-Cost, Leakage-Insensitive Semi-Digital PLL with Linear Phase Detection And FIR-Embedded Digital Frequency Acquisition

作者/Author：何锐,柳承文,喻学艺,李宇根,王志华
                        Rui He,Chengwen Liu,Xueyi Yu,Woogeun Rhee,Joon Young Park,Kyongsu Lee,Changhyun Kim,Zhihua Wang

会议/Conference：A-SSCC 2010

地点/Location：Beijing

年份/Issue Date：2010.8-10 Nov.

页码/pages：pp. 1 - 4

摘要/Abstract：
A semi-digital PLL utilizing a hybrid DCO is presented. A mixed-mode loop control with an analog proportional path and a digital integration path provides linear phase tracking, leakage-insensitive loop filtering, and technology scalability. With the absence of the linear TDC, the semi-digital PLL with the hybrid DCO can relax design difficulties such as achieving low power or requiring an advanced CMOS technology. Also, the hybrid finite-impulse response (FIR) filtering method is employed to reduce the DCO quantization noise without causing latency. The prototype PLL implemented in 0.18μm has the active area of 0.6mm2 where only 0.01mm2 is occupied by the analog loop filter.